IBM’s developerworks has an article on data alignment and these are some of the facts worth noting:
- Some processors completely lack the support for unaligned data access.
- Complex hardware jugglary is needed to support unaligned data access.
- Some processors trap to CPU on such accesses (PPC does so for 64-bit floating point access) and the OS does the labor to load the register with proper data.
- Whether they support or not, I guess the address bus that runs from CPU to memory just does not contain the lower “n” address bits depending on the memory access granularity.
- PPC does support 32-bit unaligned data access.
- Aligned memory access is a must for atomicity purposes. Failing to do so, could lead to synchronization problems and corruption. Can this aligned memory spawn across two pages? Is it possible?